Trace Checking with Real-time Specifications
نویسندگان
چکیده
Obtaining full models for the validation and verification of embedded systems is often difficult. The presented approach overcomes this problem by checking finite traces, which does not require any system model. Traces are generated by test car runs or hardware-in-the-loop simulation. We propose a canonical extension of linear-time temporal logic (LTL) for real-time specifications. Our algorithm translates real-time LTL formulae into corresponding Büchi automata that check finite traces. The algorithm has been implemented as part of an industrial validation and verification framework for automotive electronics and successfully applied to real-world systems.
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